Kartikay Garg

Engineering Manager at Nvidia

Role
Engineering Manager at NVIDIA
Location
San Jose, CA, US
LinkedIn followers
500 followers

About Kartikay Garg

Senior member.I am experienced in Performance analysis and modeling of GPU hardware pipeline and identifying software stack PPA tradeoffs. I am interested in heterogeneous accelerator platforms including deep learning solutions, GPU and ML inference accelerators such as neural engines.Proficient in: • Graphics pipeline• Performance analysis and tradeoff studies• Modeling in C++• Architectural exploration studies for hardware.Research Experience in the fields of:• Alternate deep learning training techniques such as neuro evolution.• 3D stack memory sparse compute characterization.• Algorithms based research with OpenCL.• Dynamic routing and networking protocols.

Experience

  1. Engineering Manager

    NVIDIA

    Mar 2026 — Present · Santa Clara, CA, US

    Leading modeling, inference, energy efficiency analysis effort for next gen Nvidia IPs. Pushing software energy efficiency with early pre silicon kernel optimizations all the way to post silicon correlation.

Education

  • YMCA University of Science & Technology, Faridabad

    Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering

  • Georgia Institute of Technology

    Master of Science (MS), Electrical and Computer Engineering

    2015 — 2017

  • Delhi Public School - Vasant Kunj

    Senior Secondary Education, Computer Science

    2009 — 2011

  • Delhi Public School, Faridabad

    Academic, Academic

    2000 — 2009

Skills

  • Circuit Design
  • Digital Electronics
  • Presentation Skills
  • C
  • Html
  • Spice
  • Photoshop
  • Digital Hardware Design
  • Atmel Avr
  • Parallel Computing
  • Application-Specific Integrated Circuits (Asic)
  • C++
  • Fpga Prototyping
  • Mpi
  • Proteus
  • Soc
  • Basics of Unix
  • Uvm
  • Verilog
  • Vhdl
  • Strategic Planning
  • Public Speaking
  • Asic
  • Ni Multisim
  • High Performance Computing
  • Matlab
  • Low-Power Design
  • Cuda
  • Xilinx Ise
  • Gnu Debugger
  • Unix
  • Analog Circuits
  • Perl
  • Embedded Systems
  • Cadence Virtuoso
  • Microsoft Office
  • Systemverilog
  • System on a Chip (Soc)
  • Data Structures
  • Pthreads

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Kartikay Garg — Engineering Manager at NVIDIA in San Jose, CA, US | Unifers