Kartik Patel

Senior Physical Design Engineer at Marvell | Ex-eInfochips

Role: Senior Physical Design Engineer at Marvell Technology
Location: Pune District, MH, IN
LinkedIn followers: 500 followers

EngineeringView LinkedIn profile

About Kartik Patel

5+ years of experience in ASIC Physical Design Domain.* Worked on 3nm, 5nm, 7nm…

Experience

Senior Physical Design Engineer
Marvell Technology
Sep 2024 — Present · Pune, IN

Education

L.D. College of Engineering
Bachelor of Engineering - BE
2016 — 2020

Contact information

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•••••@marvell.com
Personal email
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Current company

Marvell Technology

Semiconductor Manufacturing · 5K employees · Founded 1995 · 5488 Marvell Lane, Santa Clara, CA, 95054, US

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, we go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

marvell.com

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About Kartik Patel

Experience

Senior Physical Design Engineer

Education

L.D. College of Engineering

Find verified contacts for anyone on LinkedIn