Karthik Rajavel
- Role
- Soc Design Engineer - Physical Design Integration at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Karthik Rajavel
SOC Design Engineer at Intel handling backend physical design execution and…
Experience
Soc Design Engineer - Physical Design Integration
Dec 2020 — Present
Device Development Group
Skills
- Simulink
- Matlab
- System on a Chip (Soc)
- Pcb Design
- Logic Synthesis
- C
- Fpga
- Testing
- Debugging
- Cmos
- Application-Specific Integrated Circuits (Asic)
- Soc
- Silicon Validation
- Vhdl
- Field-Programmable Gate Arrays (Fpga)
- Physical Design
- Microsoft Office
- Programming
- Verilog
- Very-Large-Scale Integration (Vlsi)
- Logic Design
- Integrated Circuit Design
- Rtl Design
- Formal Verification
- Systemverilog
- Vlsi
- C++
- Perl
- Digital Electronics
- Linux
- Asic
- Pspice
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