Karnati G.

About Karnati G.

Recently (Aug - 2016) completed M-tech in VLSI Design and Embedded Systems in R.V college of Engineering and currently undergoing training in Front end (Digital design, ASIC design, RTL synthesis and verification, FPGA based design, STA and scripting languages like perl and python) in MAVEN SILICON, Bengaluru. Currently looking for entry into VLSI industry as a fresher. I also had an experience of 6 moths (as an intern) as a Research Associate in the Back End domain in Silicon Mentor, Greater Noida. I am well versed in CMOS concepts, Analog and digital, Verilog and advanced Verilog concepts.skill set:Logic synthesis with Xilinx ISESchematic and layout design in Cadence VirtuosoVHDL/Veilog coding in Model SimCFPGA design and prototypingHardware description language and programming language : Verilog,VHDL,Packages/Tools: Xilinx ISE 14.5, Riviera-PRO, Model Sim, Cadence Virtuoso, Hspice, Pspice, Kiel, ModelSimEmbedded systems, 8051, UART, ADC, RTOSOperating System : Linux, Window

Experience

1. Senior Lead Engineer

   Qualcomm

   Dec 2022 — Present

Education

• Rao and Naidu Engg. Collegr

  Bachelor’s Degree, Electronics and Communications Engineering

  2007 — 2011

• RV College Of Engineering

  Master’s Degree, VLSI Design and Embedded Systems

  2014 — 2016