Karan Methe
Senior System DV @ NVIDIA
- Role
- Senior System Design Verification Engineer at NVIDIA
- Location
- Fremont, CA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
About Karan Methe
Extensive knowledge and highly result-oriented in ASIC/FPGA Design Verification. Currently, I am working as a Sr. Design Verification Engineer at Xilinx.
Experience
Senior System Design Verification Engineer
Dec 2025 — Present
AI Data Center & Acceleration Verification
Education
Sinhgad college of engineering
B.E., Electronics & Telecommunications
2003 — 2007
San José State University
Masters, Electrical Engineering
2010 — 2012
Skills
- Logic Design
- Amba Ahb
- Soc
- Rtl Coding
- Vhdl
- Code Coverage
- Modelsim
- C
- Vlsi
- Quartus
- Logic Synthesis
- Static Timing Analysis
- Digital Electronics
- Synopsys Tools
- Circuit Design
- Firmware
- Functional Verification
- Rtl Design
- Field-Programmable Gate Arrays (Fpga)
- Assembly Language
- Xilinx
- Systemverilog
- Debugging
- Python
- Verilog
- Microcontrollers
- Application-Specific Integrated Circuits (Asic)
- Universal Verification Methodology (Uvm)
- Altera Quartus
- Ncsim
- Fpga
- Asic
- Analog
- Perl
- Eda
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.