Kanwar Malik

About Kanwar Malik

Staff-level engineer with 10+ years designing, scaling, and operating distributed platforms to handle millions of users with single-digit-ms latencies. Expert at decomposing monoliths into resilient micro-services, engineering for fault-tolerance and consistency, and aligning cross-functional teams on clear SLIs/SLOs for mission-critical public-safety SaaS.Core System Design & Leadership SkillsDistributed Systems Architecture | Scalability & Capacity Planning | Fault Tolerance & High Availability | Performance & Latency Engineering | Data Modeling & Sharding | Event-Driven & Streaming PlatformsCloud-Native Infrastructure (Kubernetes, Service Mesh, IaC)| Observability & SRE | Zero-Downtime CI/CD | Security & Compliance | Cloud Cost Optimization | Mentoring & Technical Direction

Experience

1. Senior Software Engineer

   Eschat

   Sep 2018 — Present · San Luis Obispo, CA, US

   Led design of a multi-tenant observability stack (Prometheus, Grafana, Loki) ingesting billions of metrics per day, cutting MTTR from 90 to 12 min.• Containerized 8 legacy services and authored Helm charts for zero-downtime releases, lowering cloud spend 27 %.• Implemented a centralized Elastic log pipeline with tag-based retention, trimming storage costs by double-digit percentages.• Created GitLab CI templates running unit, Postman and security tests on each merge — deploy time shrank from hours to <30 min.• Architected a cloud-agnostic PHP 8 Webservices platform on Kubernetes & Istio; consolidated 6 web apps into a scalable micro-service, slashing image CVEs by 80 % and achieving FedRAMP-Moderate.• Built a micro-frontend Customer Portal with lazy-loaded widgets; release cadence dropped from 45 min to 7 min and NPS rose by 18 pts.• Designed a C++17 Telemetry Collector & Analyzer that streams 250 k events/s at <5 ms p99.• Hardened NGINX ingress with strict TLS 1.2, HSTS, CSP and tenant-level throttling, sustaining 10 k rps with zero critical vulnerabilities.• Created an IaC load-test orchestrator that spins up 1 k+ Fargate containers, cutting environment bring-up from 45 min to 5 min.• Mentored a team of engineers and founded an architecture guild to standardize design RFCs across the org.• Re-engineered signaling from SIP/RTP to gRPC streams, reducing call-setup latency 55 %.• Developed Python & Go Kubernetes controllers to ensure high availability for stateful communication services.• Introduced a GoogleMock-based framework that substantially raised unit-test coverage.

Education

• San José State University

  Bachelor's degree Electrical Engineering, Digital Hardware Design, Computer Science

  2005 — 2009

Skills

• Windows
• Field-Programmable Gate Arrays (Fpga)
• Ms Project
• Product Management
• Customer Service
• Verilog
• Project Engineering
• Software Development
• Microsoft Office
• Python
• Vhdl
• Instrumentation
• Javascript
• Autocad
• Automation
• Engineering
• Labview
• Networking
• Shell Scripting
• Android
• Microsoft Word
• Electronics
• Testing
• Electrical Engineering
• Perl
• Embedded Systems
• Linux
• Firmware
• Troubleshooting
• Project Management
• Debugging
• Manufacturing
• Powerpoint
• Microsoft Excel
• Integration
• Databases
• Microcontrollers
• Process Engineering
• C++
• C