Kamisetti
DFx Architect at Intel Corporation
- Role
- Dfx Architect at Intel
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
Experience
Dfx Architect
Apr 2019 — Present · San Francisco, CA, US
Education
Jawaharlal Nehru Technological University
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
1993 — 1997
Skills
- Asic
- Nc-Verilog
- Rtl Design
- Static Timing Analysis
- Functional Verification
- Soc
- Verilog
- Timing Closure
- Dft
- Vlsi
- Systemverilog
- Modelsim
- Hardware Design
- Debugging
- Vhdl
- Digital Design
- Silicon
- C
- Jtag
- Dc
- Formal Verification
- Semiconductors
- Arm
- Perl
- Rtl Coding
- Processors
- Unix
- Simulation
- Logic Design
- Linux
- Timing
- Primetime
- Bist
- Ncsim
- Eda
- Tcl
- Simulations
- Integrated Circuit Design
- Hardware Architecture
- Very-Large-Scale Integration (Vlsi)
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