Kamatchi Saravanan Alagarsamy

WORK HISTORY

EDUCATION

ABOUT KAMATCHI SARAVANAN ALAGARSAMY

Chip Lead / Digital lead for multiple mixed signal ASSPs @TSMC180nm, 28nm, GF55nm, GF22nm for up-to 10 million gate. Lead the team on design, several tape-outs, silicon eval, char, qual through to release to production. Provided technical guidance for teams comprising Design, Test, Apps, Software to successfully see through several unforeseen issues such as digital system issues, Foundry, DRC rule deck problems and successfully release the product as per customer expectations. • Built / Managing a team across different disciplines such as Digital design, Design for Test, digital implementation. Developed young engineers in their careers to successfully take on high impact tasks and own significant portion of IC development. • Functional safety is a key feature of the automotive ASSPs. Design architect of safety measures at digital and chip level to meet SPFM and LPFM fault metrics for ASIL B and B(D) products. Key contributions to continuous self-test mechanisms by single /multiple tones using electro-mechanical feedback loops in MEMS sensor products. Closely engaged with FuSa and system designers to provide efficient digital FuSa architecture. • Led initiatives by working closely with Design for Test engineers to establish clear methodology for scan architecture of multiple digital Islands in a mixed signal SoCs •Variety of product development experience delivering ASSPs for Automotive MEMS, Consumer OIS camera, Consumer Low power (power gating with switchable domains) and Automotive Radar applications. Have successful track record of running many products from definition to production. Strong experience in debug of digital issues in Eval and PTE characterization.