Kamal Kiran Juturu
Engineering Manager @Intel
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WORK HISTORY
Engineering Manager @Intel
Bengaluru, IN
EDUCATION
Manipal university
MS, Microelectronics
Rashtriya Vidyalaya College of Engineering (R.V.C.E)
BE, Electronics and Communication
Sandur Polytechnic , Yeshwanthnagar
Diploma, Electronics and Communication
SKILLS
ABOUT KAMAL KIRAN JUTURU
Pre-silicon validation lead with 10+ years experience in Pre-silicon validation flows like SRC, ERC, FEV, LIB characterization and finally Mixed Signal validation and modelling. and also supporting the EV teams for their post-silicon Debug. good knowledge in RTL designExperience in running the execution of Projects Expertise in Mixed signal simulations, analysis and Problem solving capabilities. System Level modelling in Verilog-AMS and Reliability simulations.Experienced in executing projects from conception to completion.Interests include:good understanding of all the Pre-silon validation Flows, Expert in Mixed signal flows. Ability to Execute the Project completely. Verilog-A and Verilog-AMS modelling.Reliability SimulationsSpecialties: Electronic Design: Cadence DFII, Schematic editor, ADE;Layout Editors: VIRTUOSO{Cadence), GENESYS(intel), Simulators : Cadence Spectre, SpectreRF, AMS, UltrasimModelling languages: Verilog-A, Verilog-AMS, C;Scripting languages: Ocean, Perl, TCL;Worked on Cadence conformal tool for FEV validation;Worked on Layout reliability, ESD, Latch-up tools Drive and RVCAT (Intel proprietary) and IR drop tool Redhawk from Apache.
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