Kalpana Bansal
Asic Design Engineer @Apple
San Jose, CA, US
EMAILS
k••••••••@apple.com
MOBILE NUMBERS
+16•••••••61
Signup · Get unlimited contacts
WORK HISTORY
Apr 2014 — Present
Asic Design Engineer @Apple
View department →
SKILLS
Application-Specific Integrated Circuits (Asic)Synthesis (Design Compiler)SocEmbedded SystemsCRtl DesignVhdlAtpgAtpg (Tetramax and True Time)Static Timing AnalysisOperating Systems (Unix, Windows, Linux)FpgaField-Programmable Gate Arrays (Fpga)VerilogStatic Timing Analysis(Primetime)Logic SynthesisVlsi-Cad Simulation (Vcs, Modelsim, Irsim, Specman and NcsimSpiceHardware Descriptive Languages (Verilog, Vhdl, System Verilog).System on a Chip (Soc)ModelsimSystemverilogNcsimSpecmanCircuit Simulation(Hspice and Nanosim)Programming Language( C, C++)PrimetimeAsic
ABOUT KALPANA BANSAL
Motivated, results driven and curious professional with specialization in ASIC design and…
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.