Kalaiselvan M
Design Verification Engineer at Qualcomm l M TECH VLSI DESIGN l 2023 - 25 l
- Role
- Design Verification Engineer at Qualcomm
- Location
- Vellore, TN, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Kalaiselvan M
Always willing to innovate the new things which can improve the existing technology.
Experience
Design Verification Engineer
Jul 2025 — Present · Bengaluru, IN
Education
Sir Vidhyalakshmi Matric Hr.Sec School, Vellore
10th
2016 — 2017
Sir Vidhyalakshmi Matric Hr.Sec school vellore
12th
2018 — 2019
Kingston engineering college
Bachelor of Engineering - BE
2019 — 2023
Vellore Institute of Technology
Master of Technology - MTech
2023 — 2025
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.