Kakileti Jaisurya Srinivasa Rao
Asic Physical Design Sr Engineer @新思科技股份有限公司
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WORK HISTORY
Asic Physical Design Sr Engineer @新思科技股份有限公司
Hyderabad, IN
EDUCATION
Narayana Junior College - India
INTERMEDIATE, MPC
Crescent High School - India
SSC
Mahaveer Institute of Science &Technology
Bachelor of Technology - BTech, Electrical and Electronics Engineering
ABOUT KAKILETI JAISURYA SRINIVASA RAO
As a committed physical design engineer with over 3 years of experience in the semiconductor industry, I excel in navigating fast-paced design environments to deliver top-notch results. Specializing in tape outs ranging from 16nm to 5nm, I bring expertise in RTL-to-GDSII flows, floor planning, power analysis, and signoff checks. Proficient in tools like Fusion compiler, Synopsys Prime Time and IC Compiler II, I am adept at managing multiple blocks concurrently and thrive on solving complex challenges.
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