Kajal Verma
Senior Design Engineer | RTL Design | Interconnects | IPs | Network-on-chip
- Role
- Senior Engineer i - Design at Microchip Technology Inc.
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Kajal Verma
NoC Design Engineer | Microchip Technology Inc. • VLSI & Embedded Systems background • Led RTL design and integration of a Network-on-Chip (NoC) • Expertise in Lint & CDC checks for design analysis
Experience
Senior Engineer i - Design
Mar 2025 — Present · Bengaluru, IN
Education
National Institute of Technology Raipur
Master of Technology - MTech
Chhattisgarh Swami Vivekanand Technical University, Bhilai
Bachelor of Engineering - BE
Skills
- Powerpoint
- Robotics
- Critical Thinking
- C++
- Arduino
- Arts & Crafts
- Positive Behavior Support
- C
- Embedded Systems
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