Kajal
Design Engineer at AMD | EX - INTEL | MTech VLSI Design
- Role
- Field-programmable Gate Arrays Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Kajal
Worked with FPGA Prototyping and emulation team• Experienced with FPGA design synthesis and debugging using tools such as VIVADO, synplify•Worked on Haps protocompiler. •RTL Integration of AXI Tracker• Presented project updates and results, effectively communicating technical information in a clear and concise manner.•Experience in verilog and FPGA•Knowledge of protocols :AXI4
Experience
Field-programmable Gate Arrays Engineer
Dec 2023 — Present · Hyderabad, IN
Education
Vellore Institute of Technology
Master of Technology - MTech, VLSI DESIGN
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