K Shreyas
ASIC Design Verification Engineer - II | Onsemi
- Role
- Asic Design Verification Engineer - Ii at onsemi
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About K Shreyas
IC Design Verification Engineer with focused experience in verifying image sensor IPs and…
Experience
Asic Design Verification Engineer - Ii
Jun 2025 — Present · Bengaluru, IN
Education
Hymamshu Jyothi Kala Peetha
Physics, Chemistry, Mathematics, Electronics(PCME)
2016 — 2018
Jnanodaya School
Class 1 - Class 10
2004 — 2016
Dr. Ambedkar Institute Of Technology
Bachelor's degree
2018 — 2022
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