K. Praveen Kumar

About K. Praveen Kumar

To take up a challenging and innovative job for which I can use my technical and interpersonal skills as part of team manger or myself for the growth of company and to increase my level of expertise->+12 years of experience in Physical Design From Netlist to GDS (Place & Route, Timing Closure and Back end activities) along with BUMP/Package exparties -> Worked on various genertion of DDRPHY physical design up to LPDDR5 -> Handled mililon gate & memory densed desing physical design closure-> Knowledge on mixed signal IP interfaces & challenges -> Strong experience in Block level PnR Implementation of multimillion gate and complex designs in cutting edge process technologies-> Strong Knowledge on Timing Closure -> Tapeout experience on varies technology nodes 7nmFF,10nmFF,28nm->Working experience on Power Estimation and Power Analysis.Domain Expertise-Physical Design Flow and advance technology Nodes are 4nm,7nm,10nm, 16nm FinFet and 28nm-STA (PrimeTime)-Physical Verification (Caliber)-Power Estimation -Power Analysis (Redhawk/RSHC- Static and Dynamic)-Knowledge on Formality and Spotlight -Bump/Package routing exparties

Experience

1. Senoir Staff Engineer Physical Design

   Qualcomm

   Sep 2016 — Present · Bengaluru, IN

   Physical Desing Manager - Handling Netlist to GDS signoff activity\'s in DDRPHY IP (LPDDR5)

Education

• NIT Durgapur

  M.Tech, Micrielectronics and VLSI

  2009 — 2011

Skills

• Xilinx
• Static Timing Analysis
• Perl
• Vlsi
• Verilog
• Physical Design
• Drc
• Team Leadership
• Clock Tree Synthesis
• Tcl
• Design Rule Checking (Drc)
• Place & Route
• C