K Nabin Rao

About K Nabin Rao

10+ years of experience in Analog, Digital, Mixed signal & RF domain Layout.• Experienced in multiple end to end full chip & IP layout flow starting from Scheduling & floor-plan to GDS & LEF delivery. Sound knowledge in post-Silicon issues and Packaging. • Hands on experience in delivering full chip for Finger Print Sensor, Display drivers for AMOLED applications, Audio Codec Chip.• Hands on experience in multiple PMIC blocks such as DCDCs, BGR, LDO, CP, High frequency blocks such as PLL, DLL, Receiver, Mixer, Data Converters such as DAC.• Worked in various PDK starting from lower nodes such as 3nm, 5nm, 7nm FinFet to higher nodes such as 45nm, 130nm, 180nm & 22nm FDSOI technology.• Sound skilled in Automation (both in scripting & PCell development) to reduce the manual and repetitive tasks & maintaining the quality of deliverables. • Independent execution of project consisting of 2-5 team members. Experienced in communication with multiple clients from USA, China & Japan during the course of execution of the project to understand their requirements.• Received Multiple recognition from Sankalp Semiconductor for Customer delight, Quality & Execution champion for various quarters in 20••••19. Received individual annual award for the year 20••••19. • Presented 2 technical papers in CDNLive-India forum in 2014 & 2017 & won the Winner title for the Bachelor’s Category in 2014.

Experience

1. Layout Design Engineer

   Texas Instruments

   Feb 2022 — Present · Bengaluru, IN

Education

• National Institute of Science and Technology

  Bachelor's Degree, Electronics and Communication

  2010 — 2014

Skills

• Vlsi
• C
• Mixed Signal
• Asic
• Perl
• Verilog
• Matlab
• Electronics
• Physical Design
• Vhdl
• C++
• Analog