Jyoti Vashisth

WORK HISTORY

EDUCATION

ABOUT JYOTI VASHISTH

VLSI Design and Verification Engineer. Passionate about pushing the boundaries of technology, I am currently immersed in the dynamic world of Advanced VLSI design and Verification. As a trainee, has an interest to learn and to innovate new ideas. Equally open to working and sharing responsiblity with a team. Posses capability of working with a team and alone. Here is a sneak peak of what i know - Digital electronics - Verilog - System verilog -UVM - STA ( static timing analysis)-DFT -Linux operating system -Perl - Functional Verification Known EDA Tools - Modelsim -QuestaSim - Quartus Prime - Synopsys -VCS - Xilinx- vivado Technical toolkit includes proficiency in industry-standard tools, hands -on experience with - AMBA AHB to APB Bridge Verification using UVM - Router 1*3 : Design using verilog, Verification using UVM Behavioral Skills- Communication skills - Collabrative - Organized