Jyoti Rathore
Senior Analog Layout Engineer @7Rays Semiconductors
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WORK HISTORY
Senior Analog Layout Engineer @7Rays Semiconductors
Bengaluru, IN
EDUCATION
BN COLLEGE OF ENGINEERING AND TECHNOLOGY, LUCKNOW
B.tech , Electronics and communication engineering
ABOUT JYOTI RATHORE
Analog & I/O layout Design Engineer,> Recently I worked on TSMC, technology node 3nm & 5nm finfet.also-> worked on Ribbonfet LVDS intel18A (1.8nm) node.> worked on an Intel project on 16nm. Global foundry Technology nodes finfet.> Also Worked on 22nm, Global foundry Technology nodes 22fdsoi.> Good Knowledge on CMOS Fundamentals.CMOS Fabrication, Layout Techniques.> Experience in Custom Layout Design of Analog Blocks such as OPAMP and BGR.> Experience designing GPIO blocks such as Level Shifter, PUPD block,Driver block, Top level blocks, Knowledge in dealing with critical issues like Latch Up, EM, IR.Problem Solving skill on DRC, LVS.Tools: Custom compiler and Cadence virtuous
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