Jyothiswari Pilli
SOC Full chip Timing Engineer at Intel Technology India Pvt Ltd
- Role
- Soc Full Chip Timing Engineer at Intel
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Jyothiswari Pilli
6+ years of Industry Experience in ASIC Static Timing closure. Experienced over 9 Tape…
Experience
Soc Full Chip Timing Engineer
May 2024 — Present · Hyderabad, IN
Education
RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
SSC(10th class) , 9.8/10
2011 — 2012
RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
Bachelor of Technology - BTech, Electronics and communications Engineering, 8.41/10
2014 — 2018
RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
PUC, 7.8/10
2012 — 2014
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