Jyothish B
Senior Engineering Leader (Emulation) at Google | Ex-Arm, Ex-Broadcom
- Role
- Senior Engineering Leader (Emulation) at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Jyothish B
Seasoned professional with decades of comprehensive experience in the semiconductor…
Experience
Senior Engineering Leader (Emulation)
Sep 2022 — Present · Bengaluru, IN
o Leading gChips Emulation India Team that delivers emulation platform for both IP & SoC Validation, Performance Analysis, OS/Software, and FPGA/HAPS/InCircuit Prototypeo Architecting & Transforming SoC Validation (Emulation) platforms for Mobiles, Wearables, Hearableso Develop & deliver all flavour\'s of Emulation Models such as Virtualiser / Hybrid IP and SoC platforms, Pure SoC / Pure RTL platforms & InCircuit Prototypes covering both Pre-Silicon Validation & Post-Silicon bug recreationso Collaborate with multiple teams - IP Design, IP DV, SoC DV, Silicon Validation, SoftwareAchievements: DSPA How Awards 2023 Winner & becoming the \"first recipient\" from the Google Silicon Division to win this prestigious award Presenter @DAC62 2025 at San Francisco on \"Validation journey of SOC High Speed Interfaces: From sim to real device\" Plenary Speaker at the 2nd International Conference on Trends in Engineering Systems and Technologies (#ICTEST 2025 ) Member of Code Review Committee Panel for Google Girl Hackathon India 2025 (Silicon Track) Member of Expert Committee Panel at CadenceLive India 2024 & 2025 for Paper Selection Process Multiple Presentations from team @SNUG India 2025 on \"Validation Journey of SOC High Speed Interfaces: From Sim to Real Device\" & \"Accelerating LPDDR6 & UFS5 Validation: Left Shift with Hybrid Emulation\" Multiple Presentations from team @SNUG India 2024 on \"Enabling PCIe & NVMe Pre-Silicon Validation with Real Device using EP1 Emulator\" & \"UPF Based Hybrid Emulation\" Presenter @Alphabet Hardware Design Validation Summit 2024 on \"Efficient Debug Strategy - Emulation Protocol Monitors\" Poster presenter @Alphabet\'s Chip Summit 11, 2023 on \"Transforming Emulation Users Experience\" Presenter @Alphabet Hardware Design Validation Summit 2023, Mountain View, California on \"Crafting right Validation platforms\" Received multiple peer bonus & spot awards.
Education
Govt. Model Engineering College
Master of Technology (M.Tech), VLSI & Embedded Systems
2014 — 2016
Model Technical Higher Secondary School, Kaloor
Higher Secondary School (Techincal), Electronics Service Technology
2005 — 2007
IIMK MDP (Management Development Programme) -Indian Institute of Management Kozhikode
New Age Management Program for Senior Professionals
SCMS School of Engineering & Technology, Karukutty
Bachelor of Technology (B.Tech), Electronics & Communciation Engineering
2007 — 2011
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