Junyan Gao
SoC Design Verification Engineer at Apple
- Role
- Staff Design Verification Engineer at Apple
- Location
- Sunnyvale, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Junyan Gao
ASIC design & verification;UVM;Hardware Modelling;Data Structure & Algorithms;Software programming;
Experience
Staff Design Verification Engineer
Oct 2024 — Present · Santa Clara County, CA, US
Education
Shanghai Jiao Tong University
Bachelor's Degree, Electronic Science and Technology
2007 — 2011
Columbia University
Master's Degree, Electrical Engineering
2011 — 2012
Skills
- Express.js
- Mysql
- Spice
- Matlab
- Modelsim
- Vhdl
- Mongodb
- Javascript
- Algorithms
- Data Structures
- Java
- Universal Verification Methodology (Uvm)
- C++
- C
- Verilog
- Systemverilog
- Perl
- Python
- Asic
- Django
- Cadence Virtuoso
- Simulink
- C#
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