Juluri Avinash

TRAINED IN VLSI PHYSICAL DESIGN | ECE GRADUATE 2023 | PD FLOW, PnR, MATLAB, ICC2 Tool

Role: Gpio Layout Design Engineer C at Cadence
Location: Hyderabad, TG, IN
LinkedIn followers: 500 followers

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Experience

Gpio Layout Design Engineer C
Cadence
Sep 2025 — Present · Hyderabad, IN

Contact information

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Current company

Cadence Design Systems

Software Development · 12K employees · San Jose, California, United States

Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.

cadence.com

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Experience

Gpio Layout Design Engineer C

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