Jue Shi
Astera Labs
San Jose, CA, US
EMAILS
j••••••@asteralabs.com
MOBILE NUMBERS
+12•••••••66
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WORK HISTORY
Present
@Astera Labs
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EDUCATION
1994 — 1997
Peking University of China
M.S, Quantum Electronics
2006 — 2008
Oregon graduate institute of science and technology
Course only, Analog IC design
1989 — 1994
Peking University
Bachelor of Science (B.S.), electrical engineering
1997 — 2000
University of Idaho
M.E, Device Physics, Modeling and Simulation
2011 — 2012
Portland State University
Course only, Electrical and Electronics Engineering
SKILLS
Mixed SignalCmosIcAnalogAnalog Circuit DesignSemiconductorsTestingSocVerilogSpicePcb DesignPower ManagementYieldVlsiFpgaArduinoC#DebuggingCharacterizationApplication-Specific Integrated Circuits (Asic)CElectronicsC++
ABOUT JUE SHI
I am a Silicon Validation Engineer who combines technical depth in Python and ASIC debug…
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