Jue Shi
- Role
- Astera Labs
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Jue Shi
I am a Silicon Validation Engineer who combines technical depth in Python and ASIC debug…
Experience
Present
Education
Peking University of China
M.S, Quantum Electronics
1994 — 1997
Oregon graduate institute of science and technology
Course only, Analog IC design
2006 — 2008
Peking University
Bachelor of Science (B.S.), electrical engineering
1989 — 1994
University of Idaho
M.E, Device Physics, Modeling and Simulation
1997 — 2000
Portland State University
Course only, Electrical and Electronics Engineering
2011 — 2012
Skills
- Mixed Signal
- Cmos
- Ic
- Analog
- Analog Circuit Design
- Semiconductors
- Testing
- Soc
- Verilog
- Spice
- Pcb Design
- Power Management
- Yield
- Vlsi
- Fpga
- Arduino
- C#
- Debugging
- Characterization
- Application-Specific Integrated Circuits (Asic)
- C
- Electronics
- C++
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.