Joris del Pino

About Joris del Pino

MTS Design Engineer at Advanced Micro Devices (AMD) in the Boston area. Working on processor design. Passionate about digital circuits design, computer architecture, and FPGA applications.Master of Science in Electrical Engineering from the Illinois Institute of Technology.Overall GPA : 4.0/4.0Experiences with hardware development tools and simulators for logic design, synthesis, and physical design. Familiar with PnR implementation, RTL to GDS flow, RTL synthesis, place and route analysis, timing closure, full chip design, block level design, physical & electrical verification, LVS / DRC fixing, advanced ECO works, scripting, HDL and EDA tools.• Hardware : Verilog, VHDL, SPICE.• CPU architectures : x86-64, MIPS.• Scripting : Python, tcl, Matlab.• Favorite text editor : Vim.• FPGA boards : Altera DE2-70, Digilent Basys2, and Xilinx Kintex-7 KC705.• Synthesis and analysis : Xilinx Vivado, ISE Design, Altera Quartus, Synopsys Design Compiler.• Simulators : Synopsys IC Compiler II (ICC2), PrimeTime (Pt), ModelSim, Synopsys HSPICE, Formality, PSpice.• Schematic & Layout design (CAD): Cadence Virtuoso, Cadence Encounter, CadSoft EAGLE.• Programming : Python, C, C++, Assembly language.• Operating Systems : Linux, OS X, Windows.• Measuring instruments : oscilloscope, multimeter, function generator, spectrum analyzer.• ASIC design flow : digital logic design and verification, RTL design, logic synthesis, placement, routing, STA, timing constraints, DRCs, layout.I am creative, optimistic and perseverant. I am a fast learner. I know what I want and I am used to making the best possible efforts so as to reach my objectives. I like tasks well-done. I have always been a hard worker, and grew up with parents who encourage hard work as a family value.Please feel free to contact me.

Experience

1. Member of Technical Staff Design Engineer

   AMD

   Jul 2024 — Present · Boston, MA, US

   Massachusetts, United States.• Working on processor design, in a physical design team.

Education

• Lycée Saint-Marc

  French High School Diploma in Science

  2007 — 2010

• Lycée Berthollet

  Classe Préparatoire aux Grandes Écoles (CPGE)

  2010 — 2011

• Illinois Institute of Technology

  Master of Science (M.Sc.), Electrical and Electronics Engineering

  2015 — 2016

• Lycée Joffre

  Classe Préparatoire aux Grandes Écoles (CPGE)

  2011 — 2013

• Ecole nationale supérieure de l'Electronique et de ses Applications

  Bachelor of Science (B.Sc.), Electrical, Electronics and Communications Engineering

  2013 — 2015

Skills

• Xilinx Vivado
• Verilog
• Pspice
• Vhdl
• Cadence Virtuoso
• Digital Circuit Design
• Analog Circuit Design
• Integrated Circuit Design
• Microprocessors
• Rtl Design
• Schematic
• Mips Assembly
• Hardware Architecture
• Xilinx Ise Design
• Logic Synthesis
• Electronics
• Cadsoft Eagle
• Matlab
• Soc
• Verification
• Logic Design
• Tcl
• Layout
• Mosfet
• Algorithms
• Physical Design
• Linux
• Modelsim
• System of Chip
• C
• Microsoft Office
• Vlsi
• Fpga
• X86 Assembly
• Asic
• Spice
• Design Compiler
• Formal Verification
• Microelectronics
• Digital Ic Design