Jomon K Joy

About Jomon K Joy

Core Competencies Micro-architecture and design of High-throughput/Low-latency PCIe (Gen5x16) Queue DMA IP for RDMA/Virto-IO NIC application. Micro-architecture and design of L2-Swicth/L3-Router for networking application. Hands on experience on latest Intel Agilex & Xilinx Ultrascale+/Zynq FPGA Architecture based designs. Detail understanding of Intel QuartusPrime & Xilinx Vivado FPGA tool flow. Proficient with IP Design & RTL coding using SystemVerilog. Good understanding of Static timing analysis and closure. Experience on protocols like Ethernet (L1-L3), XAUI/RXAUI, SGMII, PCIeGen3, DDR3/4, QDR2, SERDES’s(10GPCS/PMA), AXI, Avalon-ST/MM, AHB, APB, SPI, I2C and UART. Experience with Logic synthesis and optimization for PPA. Good knowledge of Digital logic design. Working knowledge in Linux and Tcl / Perl /Shell Scripting.

Experience

1. Ip Logic Design Engineer

   Intel

   Nov 2019 — Present · Bengaluru, IN

   Micro-architecture and design of High-throughput/Low-latency PCIe (Gen5x16) Queue DMA IP for RDMA/Virto-IO NIC application.

Education

• Amrita Vishwa Vidyapeetham

  Master of Technology (MTech), VLSI Design

  2012 — 2013

• Cochin University of Science and Technology

  B.Tech, Electronics andCommunicationEngineering

  2006 — 2010

Skills

• Vlsi
• Fpga
• Modelsim
• Verilog
• System Verilog
• C
• Functional Verification
• Fpga Prototyping
• Digital Signal Processors
• Soc
• Digital Signal Processing
• Asic
• Systemverilog
• Ic
• Integrated Circuit Design
• C++
• Matlab
• Linux
• Algorithms
• Microsoft Office
• Xilinx Zynq
• Axi
• Hls
• Embedded Systems
• Vhdl
• Automotive Electronics
• Tcl
• Ethernet Ip
• Xilinx Vivado
• Xilinx Sdk
• Perl
• Microcontrollers
• Shell Scripting
• Embedded Software
• Machine Learning
• Arm
• Xilinx
• Static Timing Analysis
• Programming
• Hardware