Jomesh Pulinthanath Abraham
Lead Electrical Validation Engineer at Intel Corporation. SerDes Validation, Signal and Power Integrity, High-speed interconnect qualification, Mixed signal IP validation, TBT5, USB4, PCIE
- Role
- Component Design Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Jomesh Pulinthanath Abraham
Experienced SoC validation engineer with strong background in Functional and Electrical…
Experience
Component Design Engineer
Apr 2017 — Present · Hillsboro, OR, US
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.