Jobeesh Kv

About Jobeesh Kv

Emulation experience on Palladium, Veloce, and Zebu platforms. including compilation, debug, performance and throughput tuning.Experience writing scripts using Perl, Python, Makefile. Experience with waveform debug using Verdi/SimVision and Visualizer.Experience in creation, deployment and support of advanced emulation environments.Experience in support and enable multiple Emulation environments by developing infrastructure using the latest emulation techniques.Experience on SoC and IP bringup on emulation, root cause UVM and SoC CPU test and emulator environment issues.Close collaboration with Design, DV, Power, Silicon Validation, Performance and Software teams-Design, debug, communication.Knowledge on AMD and Intel SoC Emulation, Validation & verification. Creating Emulation Model Builds using Synopsys Zebu, Veloce and Palladium Emulator platform with the latest RTL and changing configurations. Skills in Linux environment and gvim, Hardware Testing Skills, ICT Methods, Boundary Scan Methods, Board level Testing, Debugging skills,Circuit analysis (Analog and Digital),Preparing Test Cases and Test Reports.

Experience

1. Mts Silicon Design Engineer

   AMD

   Mar 2021 — Present

Education

• Kalinga University, Raipur

  Bachelor of Engineering (B.Eng.), Electronics and Telecommunications

  2013 — 2016