Jitendra Prasad
Cadence Design Systems >> Ex STMicroelectronics >> Sankalp Semiconductor
- Role
- Lead Designer at 铿腾设计系统公司
- Location
- New Delhi, DL, IN
- LinkedIn followers
- 500 followers
About Jitendra Prasad
9.5+ yrs of experience as a Custom Analog and Mixed Layout designer. Worked on High Speed SerDes(tx, ctle, pi and other subblocks, UCIE(sp and Ap)), DDRIO, High current LDO, PLL, Comparator, Oscillator, Worked on Graphical PCELL.* Worked on full design cycle from scratch to delivery, EMIR flow, ESD PERC* Techonlogy GAAFET A14/2nm FinFET tsmc 3/5/7/16/28/45nm, Intel IFS 22nm, sf4x, BCD, FD-SOI, Bulk CMOS, 22nm, 28nm, 40nm, UMC 80nm, SMIC 180nm, tsmc 180nm, lbc9 & 8 technologies.Tools used virtuoso L, EXL,*Proficient in tools like CALIBRE, PVS,PEGASUS,Assura DRC, LVS, VOLTUS, QUANTUSBasic scripting using skill
Experience
Lead Designer
Sep 2020 — Present · IN
Education
Silicon Institute of Technology (SIT), Bhubaneswar
Bachelor's degree, Electrical and Electronics Engineering
2011 — 2015
Ghanshyam Hemlata Vidya Mandir
Science
2009 — 2010
DAV Public School
Science
2004 — 2008
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.