Jinsong Tang

About Jinsong Tang

Experienced silicon design engineer with demonstrated ability to deliver high quality products on aggressive schedules;• Successfully executed over ten (10) designs from technology 0.25um to 5nm with most recent two compilated 5nm high-end Mobile SoC • Proficient in complete design process and related 3rd party EDA tools;• Communicated efficiently with external customers, and internal engineering team;• Expertise includes SoC/IP integration, synthesis, static timing analysis, DFT architecture planning and implementation, equivalence check, physical floorplanning, Placement, CTS, Routing, Physical Verification and Sign offSpecialties:• ASIC/IP integration & synthesis• Equivalence Check & Debug• Testability Planning & Implementation• Low Power Design with UPF• STA and Timing sign off/ECO• Physical Design from floorplanning to final GDS out

Experience

1. Gpu Physical Design Engineer

   Samsung Semiconductor

   Sep 2022 — Present · Austin, TX, US

Education

• Tsinghua University

  BS, Electronic Engineering

  1989 — 1994

• Illinois Institute of Technology

  MS, Electrical Engineering

  1999 — 2000

Skills

• Embedded Systems
• Eda
• Application-Specific Integrated Circuits (Asic)
• System on a Chip (Soc)
• Logic Synthesis
• Asic
• Arm
• Verilog
• Debugging
• Semiconductors
• Very-Large-Scale Integration (Vlsi)
• Soc
• Static Timing Analysis
• Dft
• Ic
• Formal Verification