Jingzhou Wang
TD Failure Analysis and Integrated Yield Engineer
- Role
- Td Failure Analysis and Integrated Yield Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Jingzhou Wang
Working in the field of cutting-edge semiconductor processing technology, semiconductor defect identification and analysis, and yield improvement- Ph.D and M.S. in electrical engineering. 7 years of experience in growth and characterization of the (InN, GaN, AlN) semiconductor materials; rare earth luminescence in semiconductors; characterization of low dimensional semiconductor devices (LED, laser diode, photo-voltaic devices).
Experience
Td Failure Analysis and Integrated Yield Engineer
Apr 2022 — Present
Education
Ohio University
Ph.D, Electrical Engineering (Semiconductors)
2009 — 2016
Ohio University
Master of Science, Electrical Engineering
2007 — 2009
Beijing Jiaotong University
Bachelor of Science, Optical information science and technology (Physics)
2003 — 2007
Skills
- Afm
- Research and Development (R&D)
- Nanotechnology
- Laser
- Materials Science
- Optoelectronics
- Microsoft Office
- Plasma Enhanced Chemical Vapor Deposition
- Matlab
- Scanning Electron Microscope
- Testing
- Electrical Engineering
- Optical Spectroscopy
- Characterization
- Research
- Hall Effect Measurement
- R&D
- Spectroscopy
- Cvd
- Thin Films
- Deep Level Transient Spectroscopy
- Optics
- Photonics
- Scanning Electron Microscopy
- Plasma-Enhanced Chemical Vapor Deposition (Pecvd)
- Java
- Photolithography
- Labview
- Semiconductors
- Autocad
- Simulations
- Atomic Force Microscope
- Data Analysis
- Physics
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