Jijesh Kunnath
Physical Design Engineer | Semiconductors
- Role
- Physical Design Engineer at Sandisk
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Jijesh Kunnath
10+ Years Of Experience In Physical Design.Professional Skills:Netlist-GDSIIChip Level PDBlock Level PDFloorplanningCongestion/Critical Path FixClock Tree Synthesis/Custom ClocksTiming Constraints/STA MethodologyMCMM Timing ClosureSI/Noise/CrosstalkLow Power/CPF/UPF/CLPSPEF/ECO/Timing/Functional/PowerIP HardeningIR Drop/Static/DynamicEMPV/DRC/LVS/ERC/Block/ChipRule Deck/DRMDFM/DFYFormalVerification/LECTCL/Shell/Make/PerlSynthesis/PPA/PhysicalIndustry Standard EDA Tools/Power User of Cadence SuiteGenus/Innovus/Tempus/QuantusQRC/ConformalLEC/CLP/Calibre/ICV/RedHawk
Experience
Physical Design Engineer
Feb 2025 — Present · Bengaluru, IN
Bengaluru, Karnataka, India
Education
New Horizon College of Engineering
Bachelor of Engineering - BE
2009 — 2013
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