Jiayu Wang
DDR ASIC Design Engineer @ Qualcomm | MS ECE @ UCLA | Focus on ASIC / Digital Design
- Role
- Ddr Asic Design Engineer at 高通
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Jiayu Wang
I am Jiayu (Kelvin) Wang, a full-time ASIC engineer at Qualcomm Snapdragon Global SoC…
Experience
Ddr Asic Design Engineer
Feb 2025 — Present · San Diego, CA, US
Education
UCLA
Master of Science - MS, Electrical and Computer Engineering
University of California, Davis
Bachelor of Science - BS, Electrical and Computer Engineering
2017 — 2021
The High School Affiliated to Renmin University of China
High School Diploma
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