Jianmin Zhang

About Jianmin Zhang

PROFILE1. 15+ years work experiences including signal integrity and power integrity for systems, chips, and packages a. Google consumer products including, Pixel phones, watch, and ear buds and SOC packages. b. Apple iPhone, iPad, Apple Watch, AppleTV, Mac, and SOC packages. c. Altera FPGAs d. Cisco Nexus 7K Series switches, backplanes, line cards, high-speed interfaces, SerDes, and ASIC. System performance validation and PKG/PCB design.3. eNoise (audio noise in mobile systems) modeling/debugging/analysis and singing capacitor induced acoustic noise modeling and singing capacitor source model development4. RF Desense and Coexistence modeling, SOC and SIP module self-shielding modeling, low EM field emission battery structures5. Modeling tools including Ansys HFSS, Q3D, SIwave, Maxwell, Sherlock, and Workbench; Cadence PowerSI, PowerDC, SystemSI, Spectre, ADS, HSPICE, Hyperlynx, CST EM studio, Sentinel-PSI, etc. Hands on experiences on lab equipments including VNA, TDR, Oscilloscope, Bert, Power Analyzer etc7. 60+ publications including conference papers and journal papers. Received the Technical Achievement Award from EMC Society in 2019

Experience

1. Sr Staff Hardware Engineering Manager

   Google

   Jun 2017 — Present · US

   Signal Integrity, Power Integrity, System Coexistence, System Design Validation, Low Emission Battery Design, eNoise Modeling, Singing Capacitor Simulation and Source Model Development, Pixel Phone, Watch, and Buds, and SOC SIPI.

Education

• Missouri University of Science and Technology

  Ph.D, SI/PI/EMI/EMC

Skills

• Signal Integrity
• Simulations
• Pcb Design
• Electromagnetics
• Tcl
• Debugging
• Spice
• Asic
• Mixed Signal
• Eda
• Serdes
• Hardware Architecture
• Verilog
• Pcie
• Fpga
• Circuit Design
• Electrical Engineering
• Vlsi
• Soc
• Analog
• Altera
• Rtl Design
• Analog Circuit Design
• Static Timing Analysis