Jiamu Wang
Verification Engineer @NVIDIA | MS EE(Honors) @USC
- Role
- Verification Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Jiamu Wang
I am a Hardware Verification Engineer in NVIDIA, Santa Clara, CA.
Experience
Verification Engineer
Jul 2023 — Present · Santa Clara, CA, US
Generating test bench wrappers to connect different IPs by viva and implementing gate-level Verilog files into the models on hardware platforms.Bringing up the PCIe interface between the emulator and host, sending test traces from the host to DUT, and executing hardware regressions.Engaging in team infrastructure and methodology development with AI agents to improve the efficiency and reliability of verification flow, targeting push-button.Enabling software full-stack tests by setting up the firmware and OS in pre-silicon stage to help eliminate risks.Collaborating with architecture team to track the test plan, and working with full-chip verification team to debug and bring up the model for each integration.
Education
University of Cambridge
Exchange Student, Electronic Engineering and Nanotechnology
2018 — 2018
Hohai University
Bachelor's degree, Electrical Engineering and Automation
University of Southern California
Master of Science - MS, Electrical Engineering
2021 — 2023
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