Jiaming Fan
R&D Engineer at Synopsys
- Role
- Senior Engineer at Synopsys Inc
- Location
- Dallas-Fort Worth, TX, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Jiaming Fan
Senior R&D Engineer in leading EDA company - Synopsys Three years industry experience…
Experience
Senior Engineer
Dec 2019 — Present
Education
Beijing University of Civil Engineering and Architecture
Bachelor's degree
2010 — 2014
The University of Texas at Dallas
Master's degree
2014 — 2016
Skills
- Xilinx Ise
- Rtl2gdsii
- Digital Signal Processors
- Analog Circuit Design
- Research
- Modelsim
- Cadence Virtuoso
- Digital Circuit Design
- Static Timing Analysis
- Synopsys Tools
- Verilog-Ams
- Teamwork
- Tcl-Tk
- Cadence
- Very-Large-Scale Integration (Vlsi)
- Photoshop
- Verilog
- C
- Java
- Universal Verification Methodology (Uvm)
- Awr
- Simulations
- Application-Specific Integrated Circuits (Asic)
- Integrated Circuit Design
- Uvm
- Serdes
- Signal Integrity
- Rtl
- Python
- Mixed-Signal Ic Design
- Microsoft Office
- Matlab
- Systemverilog
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