Ji Yong Park
Packaging R&D engineer at Intel Corporation
- Role
- Packaging R & d Engineer, Substrate Core Competency and Pathfinding at Intel
- Location
- Phoenix, AZ, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Packaging R & d Engineer, Substrate Core Competency and Pathfinding
Mar 2015 — Present · Chandler, AZ, US
Education
Pohang University of Science and Technology
B.S., Materials Science and Engineering
1999 — 2006
Seoul Science High School
High School Diploma
Pohang University of Science and Technology
M.S., Materials Science and Engineering
2006 — 2007
University of Illinois Urbana-Champaign
Doctor of Philosophy (Ph.D.), Materials Science
2007 — 2012
Skills
- Powder X-Ray Diffraction
- Fluorescence Microscopy
- Sputtering
- Jmp
- Materials
- Simulations
- Uv/Vis
- Matlab
- Physics
- Thin Films
- Semiconductors
- Microfabrication
- Photolithography
- Materials Science
- Characterization
- Spectroscopy
- Optics
- Design of Experiments
- R
- Afm
- Nanoparticles
- Labview
- Scanning Electron Microscopy
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