Jesus Mendoza Bonilla

Systems Design Engineer @AMD

Lead system memory electrical characterization planning, validation, analysis, and debug.Develop technical test plans to support platform bring-up and the validation execution of DDR4/5 and LPDDR4x/5 memory components in partnership with memory controller and PHY designers, BIOS developers, platform design engineers and external partners.Execute electrical and functional DDR4/5 and LPDDR4x/5 memory test plans as part of a technical platform team to verify system functionality to product specification using hardware and software validation tools.Develop scripts and tools to support system memory silicon validation, characterization, and analysis.Analyze electrical and functional test data to drive into production SOC and system solution decisions. Debug of system memory issues found during pre-silicon emulation, bring up, validation, and production phases of SOC programs.Mentor junior engineering staff in electrical characterization validation and debug concepts