Jeripothula Navya
Physical Design Engineer
- Role
- Physical Design Engineer at Capgemini Engineering
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Jeripothula Navya
I\'m Jeripothula Navya a Trained physical design engineer from SUMEDHA IT, HYD. I have knowledge about digital circuits, and CMOS and have hands-on experience in ASIC physical design flow (logical synthesis, floorplan, placement, clock tree synthesis, routing).Technical knowledge: synthesis, PNR Scripting language: TCL (Beginner)Synopsys tool : ICC2_SHELL, DC_SHELL (design compiler) cadence tool: INNOVUS (STYLUS MODE), GENUS (STYLUS MODE) I am looking for a responsible position as a physical design engineer to utilize and enhance my skills and experience toward professional growth
Experience
Physical Design Engineer
Nov 2024 — Present · Bengaluru, IN
Education
Malla Reddy College Of Engineering For Women
Bachelor of Technology - BTech
2019 — 2023
PrepInsta
Nano degree
2023
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