Jeremy Shrall

About Jeremy Shrall

Self-motivated and results oriented power management architect with over 11 years of experience in power management and power delivery architecture and over 21 years of experience in microprocessor design, system integration and validation.

Experience

1. Principal Engineer (Power Management Architect)

   Intel

   Apr 2014 — Present · Hillsboro, OR, US

   Team lead for SOC power management architecture definition and execution, including:• Translation of end product requirements to architectural and micro-architectural specifications for hardware and firmware implementation teams.• Development of pre- and post-silicon validation and execution plans• Feature definition for high volume manufacturing and silicon debug of power management related features.• Coordination with manufacturing and marketing teams• Support for platform integration, including system management firmware• Power delivery solutions including peak current requirements definition, voltage droop analysis and management, run-time voltage management algorithms.• IP integration, including reset, clocking, power delivery, voltage / frequency and idle power management micro-architecture o CPU and graphics frequency, voltage, power delivery management o Memory and fabric power management microarchitecture and algorithms• Power and performance management control algorithm development, modeling and definition.• Productivity tool and methodology development with a focus on team execution efficiency.• Mentoring of and support for junior engineers.

Education

• Purdue University

  BS, Computer Engineering

  1992 — 1996

Skills

• Feedback Control Systems
• Design for Manufacturing
• Functional Verification
• C#
• Overclocking
• C
• Soc
• Computer Architecture
• Power Delivery
• Low-Power Design
• Python
• C++
• Dft
• Power Management
• X86
• Microprocessors
• Voltage Regulator
• Intel
• Debugging
• Silicon
• Firmware
• Hardware Architecture
• Thermal Management
• Microarchitecture
• Processors
• Silicon Validation