Jayalakshmi C
Staff Dft Engineer @Xilinx
Mountain View, CA, US
EMAILS
MOBILE NUMBERS
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WORK HISTORY
Oct 2018 — Present
Staff Dft Engineer @Xilinx
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Campbell, CA, US
EDUCATION
2005 — 2009
Mahatma Gandhi University
Btech, Electronics & Communication
2010 — 2012
National Institute of Technology Calicut
Mtech, VLSI &Microelectronics
SKILLS
SystemverilogCadence VirtuosoVlsiCmosMatlabIntegrated Circuit DesignMicroprocessorsFunctional VerificationComputer ArchitecturePhysical DesignPythonDftPerlModelsimDesign for DebugVerilogVhdlIa32Logic DesignAsicAnalog Circuit DesignStatic Timing AnalysisRtl Design
ABOUT JAYALAKSHMI C
Over 6 years of experience in digital design verification engineering- Broad experience in verifying Intel’s latest 10nm server SOC and flagship client processors like Broadwell, Skylake and Kabylake - Led the formalization and documentation of verification plans from raw design requirements- Excellent track record of delivering concurrent fast paced projects
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