Jayakrishnan Vr
Senior Verification Engineer @Arm
Cambridge, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Oct 2024 — Present
Senior Verification Engineer @Arm
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Cambridge, GB
EDUCATION
2010 — 2012
Indian Institute of Science (IISc)
Master of Technology (M.Tech.), Electronics systems Engineering
2002 — 2006
University of Calicut
Bachelor of Technology (BTech), Electrical, Electronics and Communications Engineering
SKILLS
Hardware ArchitectureDebuggingDevice DriversPerlEmbedded SystemsSystemverilogArmVhdlVerilogApplication-Specific Integrated Circuits (Asic)C++Processors
ABOUT JAYAKRISHNAN VR
Senior Verification Engineer at ARM
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