Jayakrishnan Muraleedharan Nair
FPGA Engineer at NETSCOUT
- Role
- Fpga Engineer at NETSCOUT
- Location
- Sunnyvale, CA, US
- LinkedIn followers
- 500 followers
About Jayakrishnan Muraleedharan Nair
Masters in Electrical Engineering with experience in ASIC verification. 3 months hands-on training in ASIC Verification. Experience in HDL and HVL including SystemVerilog-UVM, Verilog and VHDL. Experience in Test Bench development, Scripting, Batch Mode, Regression, and Code Coverage.
Experience
Fpga Engineer
Jun 2013 — Present · San Francisco, CA, US
Education
Kerala University
Bachelor of Technology, Electronics and Communication
2004 — 2008
Ohio University
Master's degree, Electrical Engineering
2009 — 2012
Skills
- Vhdl
- Verilog
- Shell Scripting
- Matlab
- System Verilog
- C++
- Uvm
- Perl
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