Jayachandra Vudumula
Principal Engineer - ASIC Design @ Micron Technology
- Role
- Staff Engineer - Asic Design at Micron Technology
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Staff Engineer - Asic Design
Nov 2021 — Present · Harris County, TX, US
Education
SPCS municipal high school,dharmavaram,anantapur
Sreenivasa degree college,dharmavaram,anantapur, Electrical, Electronic and Communications Engineering Technology/Technician
2001 — 2006
Sri Krishnadevaraya University
Master of Science (MSc), Electronics & communications
2011 — 2013
Skills
- Osi Model
- Shell Scripting
- System Verilog
- Rtl Design
- Sram
- Vlsi
- Fpga
- Sdh
- Static Timing Analysis
- Vhdl
- Nios Ii
- Pdh
- Altera Quartus
- Amba Apb
- Integration
- Verilog
- Wireshark
- Cdc
- L2/L3 Protocols
- Modelsim
- Sta
- Ddr
- Unix
- Altera
- Ethernet
- Communication Protocols
- Tcp/Ip
- Amba Ahb
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