Jaya Ganasan
- Role
- Soc Design Engineering at Apple
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Jaya Ganasan
20+ years of experience in SoC & Processor bus architecture - Numerous technical…
Experience
Soc Design Engineering
Jul 2018 — Present
Skills
- Amba Ahb
- Static Timing Analysis
- Eda
- Integrated Circuit Design
- Arm Architecture
- Computer Architecture
- Silicon
- Arm
- Systemverilog
- Microprocessors
- System Architecture
- Verilog
- Logic Design
- Soc
- C
- Powerpc
- Application-Specific Integrated Circuits (Asic)
- Vhdl
- Vlsi
- Debugging
- System on a Chip (Soc)
- Rtl Design
- Embedded Systems
- Ic
- Asic
- Hardware Architecture
- Semiconductors
- Processors
- Tcl
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