Jay Gandhi

Pre/Post Silicon Validation

Role
Lead Silicon Validation Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Jay Gandhi

Good knowledge of processor architecture- Hands on experienced in Linux environment (shell and perl scripting)- Good Understanding of USB 2.0, APB, AHB, protocols- Good understanding of ARM processors (Cortex R4) ARM CoreSight architecture.

Experience

  1. Lead Silicon Validation Engineer

    Intel

    Aug 2022 — Present · Bengaluru, IN

    Lead end-to-end silicon validation effort, driving strategy, planning, execution, and pre-silicon enablement to ensure successful TI product deliveryCreate/develop validation plan, validation FW/SW, tests and automation tool sets targeted at pre-silicon validation.Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions. From early architecture and design inputs, pre-silicon test readiness/validation, post-silicon bring-up, validation.Experience working with Emulation/FPGA platforms for test content development, debug and enablement on Pre siliconExperience with some of the following modules/domains: UCIe, Display & PM/reset

Education

  • LDRP Institute of Technology & Research, Gujarat Technological University

    Bachelor of Engineering (BE), Electronics & communication

    2005 — 2009

  • Nirma University

    Master of Technology (MTech), Electronics and Communications Engineering

    2013 — 2015

Skills

  • Perl
  • Embedded Systems
  • Rtl Design
  • Usb
  • Fpga
  • Asic
  • Vhdl
  • Debugging
  • Arm Architecture
  • Systemverilog
  • Verilog
  • C
  • Uvm
  • Amba Ahb
  • Digital Electronics
  • Arm
  • Vlsi
  • C++
  • System on a Chip (Soc)
  • Linux
  • Functional Verification
  • Soc
  • Processors

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Jay Gandhi — Lead Silicon Validation Engineer at Intel in Bengaluru, KA, IN | Unifers