Javad Bahrami
ASIC/RTL Design Engineer @ WiLO Networks•Ph.D. Student
- Role
- Asic Rtl Design Engineer at Wilo Networks
- Location
- Washington, DC, US
- LinkedIn followers
- 500 followers
Experience
Asic Rtl Design Engineer
Jul 2024 — Present · San Francisco, CA, US
Design and validate ASIC chips with a focus on low-power RF and network protocol implementation.
Education
University of Maryland Baltimore County
Doctor of Philosophy - PhD, Electrical and Computer Hardware Engineering (Hardware Security)
Iran University of Science and Technology
Bachelor's degree, Electrical and Electronics Engineering
George Mason University - College of Engineering and Computing
Master of Science - MS, Computer Hardware Engineering (Cryptographic Engineering)
Technische Universität Berlin
Graduate Researcher, Electrical and Electronics Engineering
University of Tehran
Master of Science - MS, Electrical and Electronics Engineering (Analog/RF)
2013 — 2016
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