Jatinkumar Koshiya

About Jatinkumar Koshiya

Invites / Collaborations: h••••••••@gmail.comCurrent Role:Senior Design Verification Engineer at Microsoft, part of the Artificial Intelligence System on Chip (AISoC) Silicon team. I contribute to verifying cutting-edge designs that power the next generation of AI applications and building AI Copilots/applications which improves productivity of DV engineers in DV life cycle. Academic Background: • Master’s in VLSI Design • Bachelor’s in Electronics and Communication Engineering • Both degrees from Nirma University, India Core Competencies: • SoC & IP Verification • SystemVerilog, UVM, and advanced verification methodologies • AI Hardware, GPU, SmartNIC, and Network Processor verification • Constraint Random Verification and Performance/QoS Verification • Protocols: Ethernet, AMBA AXI4, APB • Tools: VCS, Verdi, Synopsys simulators, Perl/Shell scripting Professional Experience: • Successfully verified multiple IPs and super blocks at Microsoft, NVIDIA, and Intel • Built and integrated reference models, test benches, and coverage-driven environments • Worked with third-party VIPs and industry-standard communication protocols Knowledge Sharing & Recognition: • Passionate about mentoring and guiding aspiring engineers • Recognized with multiple awards for contributions and performance • Active content creator and educator in the VLSI/DV spaceMentorship Promise: I’m committed to helping the next generation of engineers succeed. Whether you\'re a fresher or an experienced professional, I offer personalized guidance on: • VLSI/DV career paths • Interview preparation & mock interviews • Resume & LinkedIn profile reviews • Long-term mentorship and career planningBook a 1:1 Session: • Topmate: https://topmate.io/jatinkoshiya • Preplaced (Long-term mentorship): https://preplaced.in/profile/jatin-koshiya • CodeMentor: • MentorCruise: https://mentorcruise.com/mentor/jatinkoshiya/ YouTube Channel: • Subscribe to VLSI with Jatin: Contact: • For collaborations or queries: h••••••••@gmail.comPersonal Portfolio: views expressed are my own and do not reflect those of my

Experience

1. Senior Design Verification Engineer

   Microsoft

   Mar 2025 — Present · Bengaluru, IN

   Spearheaded AI initiatives in Design Verification at Microsoft, enhancing team productivity through innovative solutions. • Developed and integrated M365 Copilot Agent and AI agents into design workflows, streamlining processes. • Leveraged tools like VS Code and GitHub Copilot to optimize design verification tasks, resulting in significant time savings.

Education

• Nirma University

  Bachelor of Technology - BTech, Electronics and communication Engineering

• Shree Sardar Patel Vidhyalaya, Surendranagar, Gujarat,India

  Higher Secondary School, Science Group A

• Nirma University

  Master of Technology - MTech, VLSI Design

Skills

• Electronics
• C
• Programming
• Management
• Vhdl
• Microsoft Excel
• Windows
• Leadership
• Microcontrollers
• C++
• Embedded Systems
• Verilog
• Teamwork
• Microsoft Office
• X86 Assembly
• Embedded C
• Matlab