Jaroslav Raszka
Embedded memory architect
- Role
- Design Engineer at Apple
- Location
- Fremont, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Jaroslav Raszka
Over two decades of industrial experience with developing innovative memories, most…
Experience
Design Engineer
Apr 2015 — Present
Education
Brno University of Technology
Ing
1977 — 1982
Skills
- Soc
- Non-Volatile Memory Architecture in a Standard Logic Process
- Embedded Nvm Reliability Qual
- Nvm Core Cell Development
- Pcie
- Ic
- Semiconductors
- Flash Memory
- Vlsi
- Low-Power Design
- Mixed Signal
- Arm
- Circuit Design
- Embedded Systems
- Eda
- Silicon
- Ultra-Low Power and High-Performance Srams
- Power Efficient on-Chip Voltage Generators
- Analog
- Characterization
- Fpga
- Ultra-Low Power Memory Architectures
- Asic
- Microprocessors
- Compilable Sram Architectures
- Cmos
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.